Moving DeFi
computation
from software to silicon.
FPGA-accelerated infrastructure that replaces the entire DeFi compute stack with dedicated hardware circuits. Sub-microsecond. Deterministic. Massively parallel.
// The Opportunity
DeFi has a hardware problem.
Every serious TradFi firm runs on FPGA. DeFi runs on software. The result is a massive efficiency gap.
// How It Works
The FPGA Pipeline
A custom hardware pipeline replaces the entire software compute stack. Each stage is dedicated silicon — no shared resources, no OS, no jitter.* 500-pool pipeline. Illustrative example based on cycle-accurate simulation.
Data Ingestion
Market data arrives via gRPC/network
Deserialization + Detection (×500)
Deserialize on-chain account data, detect opportunity
Volume Optimization (×500)
Tick-crossing simulation for optimal trade sizing
TX Assembly (×1)
Assemble full Solana transaction
Hardware ↔ Host Transfer (×1)
FPGA result back to host via PCIe
Ed25519 Sign (×1)
Cryptographic signing
Transmit
Signed TX → network
5 Verilog Modules
~600 lines of synthesizable RTL. Full pipeline: data in → signed TX out.
~200 LUTs + 1 DSP48
Tiny footprint. Room for hundreds of parallel pipelines on a single chip.
Chain Agnostic
Validated on Solana (Orca Whirlpool). FPGA layer works for any chain.
// Benchmarks
Performance at every scale.
Single-path is half the story. The real edge is parallel scaling — FPGA stays near-constant while software grows linearly.* Illustrative example based on cycle-accurate simulation. Actual performance may vary.
500-Pool Pipeline Breakdown
Scan 500 pools, pick the best, sign, send
How It Scales
FPGA stays flat, software grows linearly
THE BOTTLENECK Volume optimization with tick-crossing dominates at scale — 67μs per pool in software vs 4.9μs on FPGA. At 500 pools, software spends 33.5ms on analysis before signing. FPGA: 2.5ms total. Signing is <1% of total time — the bottleneck is purely per-pool compute.
// Business Potential
The market opportunity.
FPGA market makers provide tighter, deeper quotes updated 10–15x faster. The same infrastructure powering $10B+ in TradFi revenue — applied to a greenfield DeFi market.
Market Making Strategy
Delta-neutral approach
The DeFi Problem Today
Software bots are the bottleneck
Estimated Slippage Reduction
Impact on DEX orderbook slippage — based on TradFi benchmarks
// Applications
Chain-agnostic infrastructure.
Applies to any DeFi protocol where real-time state processing and low-latency decisions provide competitive advantage.
DEX Arbitrage
Parallel evaluation across hundreds of pools at constant latency.
Market Making
Sub-μs quote recalculation, deterministic spread management.
Liquidations
Real-time health factor monitoring across lending protocols.
Oracle Infra
Hardware-speed price validation and discrepancy detection.
Cross-DEX Routing
Evaluate all routing paths simultaneously in microseconds.
Intent Matching
Hardware-speed order matching for OFA / solver systems.
// Founder
Juan Pablo Bandera
One of the only engineers combining hardware design, DeFi protocol engineering, and quantitative trading. Building from Argentina, deploying to Amsterdam.
Hardware Design
Verilog, FPGA synthesis, testbench verification, RTL
Protocol Engineering
Solidity, Rust, smart contract security, AMM internals
Quantitative Trading
Data pipelines, strategy modeling, risk management
"In TradFi, FPGA is the standard. In DeFi, nobody is doing it. That's a massive first-mover opportunity."
Track Record
Defensibility
// Contact
Let's build the future of
DeFi infrastructure.
Building at the intersection of hardware and DeFi. Open to strategic partnerships and collaborations.
Backed & Funded by
SuperTeam Brasil
Client Partnership
Xend
Funding Partners
Pre-seed / seed investors who understand hardware + DeFi infrastructure.
Protocol Partners
DEXs, lending protocols, oracles looking for hardware-speed edge.
Infra Partners
Co-location providers, FPGA vendors, network operators.
Clients & LOIs
Protocols and trading desks seeking FPGA-accelerated execution as a service.